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Highlights the latest news on CLPD's, FGPA's and Complex Logic Soultions

Contains innovative product news for the Embedded Electronic Designer community    

Industry's lowest power, highest value FPGA devices
 
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The LatticeECP3™ FPGA family is the newest addition to the value-based LatticeECP™ (Economy Plus) FPGA series. Utilizing an ultra low power, cost-optimized 65-nm process FPGA architecture, LatticeECP3 extends the functionality of prior generation families to new levels and provides designers with enhanced features and capabilities at a fraction of the power consumption and cost of competing devices.

Key Features:

  • Lowest-Power FPGA with SERDES
  • Optimized FPGA Architecture
  • Cascadable sysDSP™ With ALU
  • Advanced Configuration Options
  • High Speed Embedded SERDES
  • Flexible sysIO™ Buffers
  • Wide Range of Package and User I/O Options


Product Brief: Lattice ECP3

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Small form-factor CPLDs are ideal for high volume handheld devices
 
 

Lattice Semiconductor announced two new, small footprint packages for its widely popular ispMACH® 4000ZE CPLDs (complex programmable logic devices), making them the best-in-class choice for use in high volume, handheld designs that demand ultra low power. The ispMACH 4000ZE family is a new generation, ultra low power CPLD family based on Lattice's highly successful ispMACH 4000 CPLD architecture. The ispMACH 4064ZE device is available now in a 64-ball ucBGA (ultra chip scale BGA) package with a 4mm by 4mm footprint, and the ispMACH 4128ZE device is available in a 132-ball ucBGA package with a 6mm by 6mm footprint, which enable both devices to accommodate the very tight space constraints common with portable and handheld equipment. In fact, the new space-saving packages enable designers to use these ispMACH 4000ZE devices in a board space that is 36% smaller than previously possible. Datasheet: ispMACH 4000ZE

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XS1-G4: 4-core processor. Multicore programming has never been so easy !
 
 

The XS1-G4 has four XCore tiles with up to 32 software threads, 1600 total MIPS and 256 KBytes of single cycle memory. This programmable device is capable of implementing multiple interfaces, data processing and integrated software stacks. Product Brief

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